|
#define | ___PCI_H 0 |
|
#define | PCI_HEADER_TYPE_GENERIC_DEVICE 0x0 |
|
#define | PCI_HEADER_TYPE_PCI2PCI_BRIDGE 0x1 |
|
#define | PCI_HEADER_TYPE_CARDBUS_BRIDGE 0x2 |
|
#define | PCI_DEVICE_MAX_COUNT 32 |
| max device count per bus
|
|
#define | PCI_FUNCTION_MAX_COUNT 8 |
| max function count per device
|
|
#define | PCI_DEVICE_CLASS_MASS_STORAGE_CONTROLLER 0x01 |
|
#define | PCI_DEVICE_CLASS_NETWORK_CONTROLLER 0x02 |
|
#define | PCI_DEVICE_CLASS_DISPLAY_CONTROLLER 0x03 |
|
#define | PCI_DEVICE_CLASS_BRIDGE_CONTROLLER 0x06 |
|
#define | PCI_DEVICE_CLASS_SYSTEM_PERIPHERAL 0x08 |
|
#define | PCI_DEVICE_CLASS_INPUT_DEVICE 0x09 |
|
#define | PCI_DEVICE_CLASS_SERIAL_BUS 0x0C |
|
#define | PCI_DEVICE_SUBCLASS_USB_CONTROLLER 0x03 |
|
#define | PCI_DEVICE_SUBCLASS_SATA_CONTROLLER 0x06 |
|
#define | PCI_DEVICE_SUBCLASS_NVME_CONTROLLER 0x08 |
|
#define | PCI_DEVICE_SUBCLASS_ETHERNET 0x00 |
|
#define | PCI_DEVICE_SUBCLASS_VGA 0x00 |
|
#define | PCI_DEVICE_SUBCLASS_BRIDGE_HOST 0x00 |
|
#define | PCI_DEVICE_SUBCLASS_BRIDGE_ISA 0x01 |
|
#define | PCI_DEVICE_SUBCLASS_BRIDGE_OTHER 0x80 |
|
#define | PCI_DEVICE_SUBCLASS_SP_OTHER 0x80 |
|
#define | PCI_DEVICE_SUBCLASS_USB 0x80 |
|
#define | PCI_DEVICE_PROGIF_OHCI 0x10 |
|
#define | PCI_DEVICE_PROGIF_EHCI 0x20 |
|
#define | PCI_DEVICE_PROGIF_XHCI 0x30 |
|
#define | PCI_DEVICE_CAPABILITY_AER 0x01 |
|
#define | PCI_DEVICE_CAPABILITY_MSI 0x05 |
|
#define | PCI_DEVICE_CAPABILITY_VENDOR 0x09 |
|
#define | PCI_DEVICE_CAPABILITY_PCIE 0x10 |
|
#define | PCI_DEVICE_CAPABILITY_MSIX 0x11 |
|
#define | PCI_IO_PORT_CONFIG 0x0CF8 |
|
#define | PCI_IO_PORT_DATA 0x0CFC |
|
#define | PCI_IO_PORT_CREATE_ADDRESS(bus, dev, func, offset) ((bus << 16) | (dev << 11) | (func << 8) | (offset & 0xFC) | 0x80000000UL) |
|
#define | pci_iterator_create(mcfg) pci_iterator_create_with_heap(NULL, mcfg) |
|
|
int8_t | pci_io_port_write_data (uint32_t address, uint32_t data, uint8_t bc) |
|
uint32_t | pci_io_port_read_data (uint32_t address, uint8_t bc) |
|
iterator_t * | pci_iterator_create_with_heap (memory_heap_t *heap, acpi_table_mcfg_t *mcfg) |
| creates an iterator over pci device devices at mcfg memory area More...
|
|
pci_context_t * | pci_get_context (void) |
|
uint64_t | pci_get_bar_size (pci_generic_device_t *pci_dev, uint8_t bar_no) |
|
uint64_t | pci_get_bar_address (pci_generic_device_t *pci_dev, uint8_t bar_no) |
|
int8_t | pci_set_bar_address (pci_generic_device_t *pci_dev, uint8_t bar_no, uint64_t bar_fa) |
|
int8_t | pci_msix_configure (pci_generic_device_t *pci_gen_dev, pci_capability_msix_t *msix_cap) |
|
uint8_t | pci_msix_set_isr (pci_generic_device_t *pci_dev, pci_capability_msix_t *msix_cap, uint16_t msix_vector, interrupt_irq isr) |
|
uint8_t | pci_msix_update_lapic (pci_generic_device_t *pci_dev, pci_capability_msix_t *msix_cap, uint16_t msix_vector) |
|
int8_t | pci_msix_clear_pending_bit (pci_generic_device_t *pci_dev, pci_capability_msix_t *msix_cap, uint16_t msix_vector) |
|
void | pci_disable_interrupt (pci_generic_device_t *pci_dev) |
|
void | pci_enable_interrupt (pci_generic_device_t *pci_dev) |
|
int8_t | pci_setup (memory_heap_t *heap) |
|
const pci_dev_t * | pci_find_device_by_address (uint8_t group_number, uint8_t bus_number, uint8_t device_number, uint8_t function_number) |
|
pci interface
This work is licensed under TURNSTONE OS Public License. Please read and understand latest version of Licence.